1. Field of the Invention
The present invention relates to a semiconductor thin film element which can build a thin film silicon circuit having electrical characteristics and a fine structure, similar to or more than those of a silicon circuit using a single crystal silicon wafer; a system applying the same; and a method of making the semiconductor thin film element.
2. Description of the Related Arts
In conventional semiconductor thin film elements using glass substrate and silicon, thin film transistors have been formed on the surface of an amorphous silicon thin film or polycrystalline silicon thin film deposited on a glass substrate. The amorphous silicon thin film and polycrystalline silicon thin film are suitable to manufacture semiconductor thin film elements (for instance, a substrate for active matrix liquid crystal devices) with a relatively large area because they can be easily deposited on a glass substrate using chemical vapor deposition method.
Recently, thin film switching elements have been formed each which has a two layered structure being of an insulating substrate and a semiconductor crystal formed thereon. Various types of switching elements having such a two-layered structure have been known. They are the so-called silicon-on-insulator (SOI) substrates. The SOI substrate can be produced by depositing a polycrystalline silicon thin film on a substrate surface of, for example, insulating material using chemical vapor deposition method, and then by heating it using a laser beam to recrystalize the polycrystalline to a single crystal structure. Another type of SOI substrate can be produced by oxidizing thermally the surface of a single crystal silicon wafer, then by subjecting it to a thermo-press bonding with a silica substrate or a single crystal silicon substrate, and finally by polishing or etching to process the single crystal silicon wafer to a predetermined thickness.
However, in conventional semiconductor thin film elements using amorphous or polycrystalline silicon thin film, sub-micron transistor elements cannot be formed by applying the fine semiconductor manufacturing technique. For example, since the amorphous silicon thin film is formed at a temperature of about 800.degree. C., high temperature processing necessary to the miniaturizing technology cannot be carried out. Furthermore, since the polycrystalline silicon thin film used for a semiconductor thin film element has a crystalline grain size of several .mu.m, it is limited naturally to miniaturize a thin film element. Since the polycrystalline silicon thin film is formed at a temperature of about 600.degree. C., it is impossible to employ fully the miniaturizing technique where processing at a high temperature of more than 1000.degree. C. includes.
Generally the SOI substrate which is formed by recrystalizing a polycrystalline film to convert to a single crystal structure does not have a uniform crystalline structure and has large lattice defect density. In the SOI substrate which is formed by thermo-press bonding a single crystal silicon and a silica substrate, there is a disadvantage in that since the difference in thermal expansion coefficient between the single crystal silicon and the silica substrate is large, the silicon thin film may peel or crack during a high temperature process at over 1000.degree. C. Moreover there have been no transparent insulating substrates which is at low prices, has a coefficient of thermal expansion similar to that of a single crystal silicon, and has a resistant property under high temperature processing over 1000.degree. C. For that reason, it has been difficult to apply a device miniaturizing technology utilized to the single crystal silicon wafer to the SOI substrate manufactured through conventional method. The SOI substrate which is formed by thermo-press bonding single crystal silicon wafers to each other can be easily formed semiconductor circuit elements on a single crystal silicon thin film by applying the device miniaturizing technology under over 1000.degree. C. However there is a disadvantage in that it has been difficult to form a three-dimensionally integrated semiconductor circuit element since semiconductor circuit elements cannot be nearly formed over both the internal surfaces at the thermo-press bonded portion.